19 Feb 2018
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26 Feb 2018
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1 Mar 2018
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9 Mar 2018
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16 Mar 2018
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30 Mar 2018
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neospeech tts voiceware korean yumi voice sapi5.zip1. Field of the Invention
The present invention relates to a method of forming an interconnect structure used in semiconductor devices and, more particularly, to a method of forming a lower interconnect structure in a dual damascene process.
2. Background Art
A dual damascene process is generally used for forming contact plugs and lower interconnect structures in an integrated circuit. In this process, an opening is formed in an insulating layer formed on a semiconductor substrate, and then filled with conductive material. The insulating layer is then etched back to form a via plug and a lower interconnect structure. The via plug may function as a conductive path between an upper interconnect structure formed above the lower interconnect structure and a lower interconnect structure.
The via plug is formed by coating an opening pattern formed in an insulating layer with a photoresist layer. The via plug is then formed by anisotropic etching of the insulating layer, using the photoresist layer as an etch mask. After etching the insulating layer, the photoresist layer is stripped.
In the dual damascene process, since the opening and the via plug are formed by etching the insulating layer, a sidewall of the insulating layer is formed with a non-uniform shape. That is, the insulating layer is etched at a bottom portion of the opening (or the via plug) at a faster rate than at a top portion thereof. Therefore, a tapered shape is formed in a sidewall of the via plug. Further, since the via plug
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